As is known to those of skill in the art, tile-based rendering (TBR) in a 3D graphics processing system renders a scene using a rendering space which is divided into subsections, which are referred to as tiles, wherein each tile is rendered independently. An advantage of TBR is that fast, on-chip memory can be used during the rendering for colour, depth and stencil buffer operations, which allows a significant reduction in system memory bandwidth over traditional immediate mode rendering (IMR) wherein the entire scene is rendered as a whole.
TBR involves two key rendering phases: geometry processing; and rasterization. During the geometry processing phase the geometry data (e.g. vertices) received from an application (e.g. a game application) is transformed into screen space coordinates. Primitives (i.e. simple geometric shapes, such as triangles, defined by the positions of one or more vertices to which a texture can be applied) are defined by the transformed vertices, and the primitive data (e.g. vertex data) is stored in memory (e.g. an intermediate buffer). A per-tile list is created of the primitives (e.g. triangles) that fall at least partially within the bounds of the tile. During the rasterization phase each tile is rendered (i.e. the colour is identified for each pixel in the tile). This enables the graphics hardware to only retrieve the primitive data related to a particular tile when rendering that tile in the rasterization phase, which keeps memory bandwidth requirements for the memory (e.g. intermediate buffer) to a minimum. The resultant colour buffer for each tile may be flushed out to a buffer until the entire scene has been rendered.
It has been shown that TBR performance can be improved by parallelizing one or more aspects of the geometry processing phase.
The embodiments described below are provided by way of example only and are not limiting of implementations which solve any or all of the disadvantages of known TBR systems.